Universal lead straightener for integrated circuit devices



FIG. 1 is a front view of a universal lead straightener for integrated circuit devices showing the ornamental design.

FIG. 2 is a back view thereof.

FIG. 3 is a left side view thereof, which is a mirror image of the right side.

FIG. 4 is a bottom edge view thereof which is a mirror image of a top edge.

FIG. 5 is an enlarged view of a portion of FIG. 1, taken along the line 5—5 in FIG. 1; and,

FIG. 6 is a perspective, partially sectionalized view taken along the line 6—6 in FIG. 5 to illustrate the shallow recesses of the arrays and to illustrate in phantom lines the manner in which the leads of an integrated circuit device fit within the shallow recesses.

The broken line showing of the environment is for illustrative purposes only and forms no part of the claimed design. 

The ornamental design for a universal lead straightener for integrated circuit devices, as shown and described. 